Work-Function Variation and Delay Analysis in NAND and NOR Circuits using Gate Insulator Stack-based Dopingless Tunnel Field-effect Transistors

This paper investigates the electrical characteristics of work-function variation (WFV) in dopingless Tunnel Field-Effect Transistor (TFETs) with SiO₂-Si₃N₄-SiO₂ (ONO) gate insulator stacks. It explores the potential benefits of using ONO structures to mitigate WFV's impact on the channel. The study also examines the immunity of TFETs to WFV and current variations compared to doping- based junctions. The paper begins by discussing the challenges introduced by increased doping concentrations, specifically poly/metal-grain granularity (MGG). The proposed dopingless TFET with an ONO stack structure is introduced, acknowledging the need for rigorous validation. Detailed information on device simulation and programming sequences for TFETs is provided. The mixed-signal circuit configuration is outlined, focusing on the use of high-performance MOSFETs and TFETs to enhance output voltage margins and reduce transition time variations. The study concludes by presenting the electrical characteristics of WFV and its impact on TFET devices. The effectiveness of program adjustments in reducing threshold voltage (Vt) scatter for both n-type and p- type TFETs is discussed. In summary, this study explains the advantages and limitations of dopingless TFETs with ONO stack structures, offering insights into their application.