Channel Validations for Transport Network System

This paper explains the channel design and validation for error-free transmission of 53GbpsPAM4 serial high-speed signals between line cards and switches in a transport network system for 5G and 6G communications. We present signal transmission channel design methods for signal integrity in the channel, such as PCB stacking methods, dielectric materials, and back-drilling process for removing via stubs, and describe channel performance validation using a channel simulation model. In addition, we present the elements necessary for the system channel to be designed in the future through validation of 112Gbps PAM4 high-speed signal integrity in the implemented 53Gbps PAM4 serial high-speed signal model.