Enhancing Ohmic Contacts in GaN HEMT Through Optimization of Ramp-Up Rate in Annealing Process
A critical factor in optimizing GaN HEMT performance is minimizing Ohmic contact resistance, which is heavily influenced by the annealing process parameters. This study investigates the impact of the ramp-up rate during a two-step Ohmic annealing process on the electrical characteristics of GaN HEMTs. By varying the ramp-up rate between 23°C/sec and 38.3°C/sec during the second annealing step, we observed significant improvements in device performance. A faster ramp-up rate resulted in a 34% reduction in contact resistance and a 7% reduction in sheet resistance, along with enhanced uniformity across wafer.
Authors
- Hong‐Gu Ji (ORCID: https://orcid.org/0000-0002-2052-5475)
- Kyujun Cho (ORCID: https://orcid.org/0000-0003-2520-9321)
- Byoung‐Gue Min (ORCID: https://orcid.org/0000-0002-5349-2526)
- Hak Jun Kim (ORCID: https://orcid.org/0000-0001-8257-809X)
- Gyejung Lee (ORCID: https://orcid.org/0000-0002-5924-5913)
- Woojin Chang (ORCID: https://orcid.org/0000-0003-0911-3709)
- Junhyung Jeong (ORCID: https://orcid.org/0000-0003-2383-1635)
- Jong Yul Park (ORCID: https://orcid.org/0000-0003-1310-6819)
- Dong‐Min Kang
- Jong‐Min Lee
Institutions
- Electronics and Telecommunications Research Institute (KR)
Publication Details
- Published
- 2024-10-16
- DOI
- https://doi.org/10.1109/ictc62082.2024.10826788
- Citations
- 1
- Primary Topic
- GaN-based semiconductor devices and materials
- Type
- article
- Field-Weighted Citation Impact
- 0.31