Resolving Care-Bit Correlations Using Clock Gates

Automotive applications have very stringent test requirements, including testing while in-field. The decompressor structure in the scan compression suffers from congestion whenever care-bits in a pattern are clustered in same or adjacent cycles. In this paper we present a novel technique to reduce the correlation between subsequent decompressor states. We introduce dummy or buffer states dynamically at selected scan slices. The solution is generic and independent of any scan compression or logic BIST architecture. We also present the design techniques and share results on benchmark circuits.

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Publication Details

Published
2024-11-12
DOI
https://doi.org/10.1109/wintechcon61988.2024.10838147
Primary Topic
Embedded Systems Design Techniques
Type
article
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article

Resolving Care-Bit Correlations Using Clock Gates

Prateek Singh, Sandeep Kumar Jain, Sanjeev Kumar Pathak
Embedded Systems Design Techniques
article

Resolving Care-Bit Correlations Using Clock Gates

Prateek Singh, Sandeep Kumar Jain, Sanjeev Kumar Pathak
article en

Abstract

Automotive applications have very stringent test requirements, including testing while in-field. The decompressor structure in the scan compression suffers from congestion whenever care-bits in a pattern are clustered in same or adjacent cycles. In this paper we present a novel technique to reduce the correlation between subsequent decompressor states. We introduce dummy or buffer states dynamically at selected scan slices. The solution is generic and independent of any scan compression or logic BIST architecture. We also present the design techniques and share results on benchmark circuits.

Openalex Percentile: Top 72%
Embedded Systems Design Techniques
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Resolving Care-Bit Correlations Using Clock Gates — Prateek Singh, Sandeep Kumar Jain, et al. · (2024) | TGRS Research Map | TGRS