Processing Multi-Layer Perceptrons In-Memory

Important modern applications such as machine learning, deep learning, graph processing, databases (and many others) are memory-bound. This creates a bottleneck caused by the movement of large amounts of data between the main memory and the CPU. Processing-in-Memory (PiM) is currently viewed as a useful new paradigm to alleviate such bottlenecks by computing the data where it resides, i.e., in memory itself. Our goal is to analyze the potential of modern general-purpose PiM architectures to accelerate neural networks (NN s), which constantly consume high volumes of new data (i.e., low data reutilization) and are ideal for in-memory processing. We selected the UPMEM system as it is the first commercially available general-purpose PiM architecture. In this work, we implemented a multi-layer perceptron and evaluated the implementation in real use cases. We compared the PiM implementation with a sequential version running in an Intel Xeon Silver 4215 CPU. The UPMEM implementation achieved up to <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$260\times$</tex> speedup for performing inference exploiting the available PiM memory.