High-Efficiency LC-MSNN Prototype with Integrated Bipolar Signaling and Half-Cycle Delayed Gating
This study introduces a hardware prototype for the Locally Connected Memristor Spiking Neural Network (LC-MSNN), showcasing a high level of energy efficiency and system integration. The prototype integrates bipolar signaling and employs half-cycle delayed gating mechanisms, which are critical for accurate signal processing in neuromorphic computing. The circuit design is meticulously optimized for chip integration and response velocity, featuring a small signal channel and a drive mode channel that facilitate the generation of unipolar and bipolar pulses, respectively. The architecture supports independent neuron operation while ensuring functional interconnectivity, aligning with the operational dynamics of biological neural networks. Notably, when benchmarked on the MNIST dataset, the prototype achieved a recognition rate of 95.2% with a power consumption of only 2.5mW, demonstrating its effectiveness in practical applications.
Authors
- Zikang Wang (ORCID: https://orcid.org/0000-0003-4995-5521)
- Chun-Wang Wu (ORCID: https://orcid.org/0000-0003-3047-3960)
- Nan Li
- Yifeng Xu (ORCID: https://orcid.org/0000-0002-0403-1141)
- Yi Sun (ORCID: https://orcid.org/0000-0002-1062-5253)
Institutions
- National University of Defense Technology (CN)
Publication Details
- Published
- 2024-09-20
- DOI
- https://doi.org/10.1109/eit63098.2024.10762030
- Primary Topic
- Photonic and Optical Devices
- Type
- article
- Field-Weighted Citation Impact
- 0.00