A Fast Transient Response Output-capacitorless LDO With Low Quiescent Power
An output capacitorless low-dropout regulator (LDO) with a transient enhancement circuit is proposed. The proposed transient enhancement circuit provides a charging and discharging path to the gate of the power transistor during rapid load changes, achieving good transient response without the need for an external output capacitor. The circuit make use of the overshoot or undershoot voltage to temporarily increase the charging or discharging current, thereby enhancing the transient response performance of the LDO. Simulation results show that the proposed LDO consumes a quiescent current of 5μA and operates with an input voltage of 1.8V, regulating output voltage of 1.6V, with dropout voltage of 200mV, and maximum output current of 100mA. When the load current steps from 1mA to 100mA with a load step of 40mA/μs, the undershoot voltage is 70.52mV, with a recovery time of 2.68μs. Conversely, when the load current steps from 100mA to 1mA in the same time frame, the overshoot voltage is 46.48mV, with a recovery time of 6.5μs. Additionally, the LDO achieves stability across the full load range of 0-100mA with an output capacitance of 10pF.
Authors
- L. X. Wang (ORCID: https://orcid.org/0000-0003-1805-6558)
- Liang Xu (ORCID: https://orcid.org/0000-0002-9629-9101)
- Xiaofei Kuang (ORCID: https://orcid.org/0000-0002-5373-0299)
- Jie Yang (ORCID: https://orcid.org/0000-0003-4801-7162)
Institutions
- Westlake University (CN)
- Hangzhou Dianzi University (CN)
Publication Details
- Published
- 2024-09-20
- DOI
- https://doi.org/10.1109/eit63098.2024.10762683
- Primary Topic
- Semiconductor materials and devices
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- Hangzhou Dianzi University