Low Power Offset-Tolerant Sense Amplifier Using Dynamic Boosting

This study proposes a dynamically boosted sample-boost-latch sense amplifier (DSBLSA). The use of dynamic boosting makes the circuit more offset-tolerant and allows operation at 70-80% energy consumption for identical performance. Additionally, this paper also proposes a scheme to maximize the dynamic boosting. The proposed circuit was validated via HSPICE simulations using a 28-nm CMOS PDK.

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Publication Details

Published
2024-11-03
DOI
https://doi.org/10.1109/icce-asia63397.2024.10773681
Primary Topic
Advanced Memory and Neural Computing
Type
article
Field-Weighted Citation Impact
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article

Low Power Offset-Tolerant Sense Amplifier Using Dynamic Boosting

Meng Han, Taehui Na, Sheng‐Ming Yang
Advanced Memory and Neural Computing
article

Low Power Offset-Tolerant Sense Amplifier Using Dynamic Boosting

Meng Han, Taehui Na, Sheng‐Ming Yang
article en

Abstract

This study proposes a dynamically boosted sample-boost-latch sense amplifier (DSBLSA). The use of dynamic boosting makes the circuit more offset-tolerant and allows operation at 70-80% energy consumption for identical performance. Additionally, this paper also proposes a scheme to maximize the dynamic boosting. The proposed circuit was validated via HSPICE simulations using a 28-nm CMOS PDK.

Incheon National University (KR)
Affordable and clean energy
Openalex Percentile: Top 77%
Advanced Memory and Neural Computing
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Low Power Offset-Tolerant Sense Amplifier Using Dynamic Boosting — Meng Han, Taehui Na, et al. · (2024) | TGRS Research Map | TGRS