Performance Characterization of CXL Memory Expander: Impact on Read and Write Latencies

As data processing requirements and memory de-mands driven by Machine Learning, Artificial Intelligence, and In-Memory Database technologies continue to grow exponen-tially, the need for systems with greater memory capacity is increasing. This trend highlights the limitations of traditional Dual In-Line Memory Module (DIMM) interfaces due to CPU package constraints in server systems. Compute Express Link (CXL) technology, leveraging the PCIe interface, has emerged as a promising solution to expand memory capacity and bandwidth. This paper evaluates the performance of ASIC-based CXL memory expanders on Intel's latest server systems. Our experimental results demonstrate that while CXL memory expanders offer significant memory capacity benefits, they also introduce additional latency. Notably, read operations are more sensitive to latency changes compared to write operations, resulting in a more pronounced latency increase for reads. This study highlights the tradeoffs associated with CXL memory expanders and provides insights into optimizing memory configurations for diverse workloads, emphasizing the importance of considering latency impacts on different types of operations.