Effective Ternary Full Adder Cells for Nanoelectronics Using CNTFET Technology

This paper works on two new very effective ternary full adder cells for nano-electronics are presented in this study. These are predicated on the special qualities of the CNTFET device, which include its capacity to set the required threshold voltages by using the appropriate nanotube diameters and the similar carrier mobilities for N-type and P-type devices. Because of these qualities, CNTFETs are an excellent choice for high-performance multiple-Vth architectures. The suggested architectures have a very high driving capability and significantly fewer transistors. Using Synopsys HSPICE and 32 nm CNTFET technology, the described ternary Full Adders are simulated to assess their performance and verify correct functioning.