A Heuristic Error Analysis Framework for Error Bottleneck Identification in Gate-Based Quantum Algorithms

In this work, we present an automatic Python framework designed to perform heuristic error analysis of gate-based model algorithms running on a given quantum computer, to identify the source, the nature, and the bottleneck of errors. The information will allow quantum hardware-algorithm co-optimization. This is particularly useful for novel algorithms and hardware. By analyzing the relative contribution of the gate error, propagation error, bit-flip error, and measurement error at each node, one can then use the information to optimize the circuit in terms of the choice of gates and physical qubits. Since it is a model based on the probability of a state being measured, it cannot capture the crossterms and interference. However, it still can be used to deduce the node/stage that has a big error due to failure in interference. In this paper, the Harrow-Hassidim-Lloyd (HHL) quantum algorithm running on the IBM superconducting qubit platform is used as a demonstration of the framework. The bottleneck of the error in the HHL circuit is identified. It should also be noted that this framework can only be used for small problems because simulation is required on a classical computer.