Optimized Algorithms for FPGA Implementation of PDCCH Chain for 5G-NR Base Station

The physical layer in a cellular network base station typically runs on a field programmable gate array (FPGA) to enable reconfigurability and adaptability to meet future demands of the network with sufficient computational power. This work proposes a novel architecture and algorithms for the FPGA implementation of the fifth-generation (5G) new radio (NR) physical downlink control channel (PDCCH) using the 3GPP procedures for downlink control information (DCI) processing, including sub-block interleaver, bit selection, scrambling, golden sequence generation, and modulation. The proposed algorithms are optimized to meet 5G-NR frame timings for DCI processing with minimum power consumption and hardware resource utilization. We perform rigorous testing including all corner cases to benchmark our designs in i) standalone mode, and ii) integrated fashion for the end-to-end PDCCH processing. The PDCCH implementation, with maximum DCI payload, using the proposed architecture and algorithms achieves <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1.5 \mu s$</tex-math> </inline-formula> latency, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1.98\%$</tex-math> </inline-formula> hardware resource utilization, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1.2$</tex-math> </inline-formula> Gbps throughput and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$10$</tex-math> </inline-formula> Gbps/W power efficiency. With a subcarrier spacing <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Delta f=30$</tex-math> </inline-formula> KHz, it can multiplex DCI to schedule up to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$20$</tex-math> </inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$40$</tex-math> </inline-formula> users for one orthogonal frequency division multiplexing (OFDM) and two OFDM symbols long PDCCH respectively.

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Publication Details

Journal
IEEE Transactions on Circuits and Systems I Regular Papers
Published
2025-01-09
DOI
https://doi.org/10.1109/tcsi.2024.3519752
Citations
3
Primary Topic
Advanced Wireless Communication Techniques
Type
article
Field-Weighted Citation Impact
2.19
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article

Optimized Algorithms for FPGA Implementation of PDCCH Chain for 5G-NR Base Station

Ekant Sharma, Samudrala Soujanya, Prem Singh, Harsha Rudramuniyappa
3 citations
IEEE Transactions on Circuits and Systems I Regular Papers
Advanced Wireless Communication Techniques
2.19
article

Optimized Algorithms for FPGA Implementation of PDCCH Chain for 5G-NR Base Station

Ekant Sharma, Samudrala Soujanya, Prem Singh, Harsha Rudramuniyappa
article en
3 citations

Abstract

The physical layer in a cellular network base station typically runs on a field programmable gate array (FPGA) to enable reconfigurability and adaptability to meet future demands of the network with sufficient computational power. This work proposes a novel architecture and algorithms for the FPGA implementation of the fifth-generation (5G) new radio (NR) physical downlink control channel (PDCCH) using the 3GPP procedures for downlink control information (DCI) processing, including sub-block interleaver, bit selection, scrambling, golden sequence generation, and modulation. The proposed algorithms are optimized to meet 5G-NR frame timings for DCI processing with minimum power consumption and hardware resource utilization. We perform rigorous testing including all corner cases to benchmark our designs in i) standalone mode, and ii) integrated fashion for the end-to-end PDCCH processing. The PDCCH implementation, with maximum DCI payload, using the proposed architecture and algorithms achieves <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1.5 \mu s$</tex-math> </inline-formula> latency, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1.98\%$</tex-math> </inline-formula> hardware resource utilization, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1.2$</tex-math> </inline-formula> Gbps throughput and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$10$</tex-math> </inline-formula> Gbps/W power efficiency. With a subcarrier spacing <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Delta f=30$</tex-math> </inline-formula> KHz, it can multiplex DCI to schedule up to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$20$</tex-math> </inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$40$</tex-math> </inline-formula> users for one orthogonal frequency division multiplexing (OFDM) and two OFDM symbols long PDCCH respectively.

IEEE Transactions on Circuits and Systems I Regular PapersVol. 72(7)
Indian Institute of Technology Roorkee (IN), International Institute of Information Technology Bangalore (IN)
Openalex Percentile: Top 14%
Advanced Wireless Communication Techniques
2.19
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