Research of FPGA-based neural network accelerators
The rapid advancement of artificial intelligence and machine learning technologies has resulted in an increasing demand for high-performance computing resources. To enhance the execution speed of computational tasks, hardware accelerators are frequently utilized. These accelerators are commonly implemented using Application-Specific Integrated Circuits (ASICs), Graphics Processing Units (GPUs), and Field-Programmable Gate Arrays (FPGAs). In recent years, FPGA-based neural network accelerators have gained significant attention in the research community. The inherent flexibility and programmability of FPGAs offer a robust solution for markedly boosting computational power in intensive tasks. This article delves into the research advancements of FPGA-based neural network accelerators over recent years, providing a thorough analysis of their performance, energy efficiency, and scalability. By examining recently published literature on the subject, the article summarizes the key academic contributions in this area of study. Furthermore, it sheds light on the future development trends and potential research directions within the field of FPGA-based neural network accelerators. This comprehensive review aims to inform and guide ongoing and future research efforts in optimizing these accelerators for more effective and efficient artificial intelligence and machine learning applications.
Authors
- Anqi Yang (ORCID: https://orcid.org/0000-0003-0811-7951)
Institutions
- University of Electronic Science and Technology of China (CN)
Publication Details
- Journal
- IET conference proceedings.
- Published
- 2025-01-01
- DOI
- https://doi.org/10.1049/icp.2024.3970
- Primary Topic
- Advanced Memory and Neural Computing
- Type
- article
- Field-Weighted Citation Impact
- 0.00