A Survey of Approximate Triple Modular Redundancy

The advancement of semiconductor technology has driven the continuous reduction in transistor sizes, resulting in significant improvements in both area efficiency and power consumption. However, these advancements have also increased susceptibility to faults caused by energetic particles. Triple modular redundancy (TMR) is a well-known logical masking technique that employs three copies of a given circuit alongside majority voters, guaranteeing 100\% single-fault coverage in the replicated modules. This reliability, however, comes at the cost of over 200\% area overhead. The approximate TMR (ATMR) concept leverages non-exact module functionality to reduce the associated area overhead while accepting a reduction in fault coverage. This work provides a comprehensive survey of ATMR generation techniques, detailing the various approximation strategies and discussing the primary approximation control mechanisms. Additionally, it presents a comparative analysis of the surveyed works, focusing on scalability and the trade-offs between area overhead and fault coverage achieved by the generated ATMR designs.