Low-Voltage Super-Regenerative Receiver with Combined VCO-Folded LNA-Quench

Super-regenerative receiver (SRR) is popular for its simplicity and power efficiency for low-power, short-range communication. This letter presents a low-voltage SSR receiver centered at 4.5 GHz. The receiver was designed in the TSMC 0.18 μm CMOS process and the receiver front-end consists of a low-noise amplifier (LNA), voltage-controlled oscillator (VCO), envelope detector, and divide-by-eight true-single phase clocking (TSPC) frequency divider. Both LNA and VCO use the structure of one transistor level for low-supply operation and they share some components including the same inductor for small die area. The chip consumes 7.983 mW at an analog supply of 0.9 V and the die area is 1.54 ×1.081 mm2.