Energy-Efficient Interpolation Filter Design for VVC Encoders Using Cross-Layer Approximate Computing

Recent advancements in video encoding have enabled significant compression rates but at the expense of increased power consumption and computational demands. This trade-off has driven the need for dedicated accelerators capable of leveraging the parallelism inherent in computationally intensive encoding tasks, particularly through customized hardware solutions. In this work, we introduce a hardware accelerator specifically designed for Fractional Motion Estimation (FME), a key component in video encoding. Our approach leverages cross-layer approximate computing to bridge the gap between logic (arithmetic blocks), architecture, and software layers. The proposed architecture, named 4TAxA, employs an interpolation filter that supports various configurations of approximate adders. Synthesis results using ST 65nm technology demonstrate that the 4TAxA filter core achieves power savings of 69.20% to 90.64% and area reductions of 50.13% to 72.59%, compared to a precise implementation with equivalent throughput. Considering a complete FME unit and a fair or better image quality threshold, our method delivers up to 60.8% power savings and 28% area savings. We expect that our contributions help designers by enabling energy- and quality-efficient encoding systems, offering a promising direction for future cross-layer approximate computing strategies.