Failure Mechanism of 1200-V SiC MOSFET With Embedded Schottky Barrier Diode Under Short-Circuit Condition

The short-circuit ruggedness and failure mechanism of a commercial silicon carbide (SiC) MOSFET with embedded Schottky barrier diode (SBD-MOS) are evaluated and revealed in this article. Compared with a conventional planar-type SiC MOSFET (C-MOS), a distinctive difference in failure phenomenon is observed for SBD-MOS under short-circuit condition. When the short-circuit withstanding time ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\textit{t}_{\text{sc}}$</tex-math> </inline-formula> ) of SBD-MOS exceeds 3.5 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $</tex-math> </inline-formula> s at 600-V bus voltage, the device fails to shut down, even though the gate is turned off. After a brief decrease, the short-circuit current rises again and continues for a period of time, eventually leading to the destructive failure. In contrast, C-MOS does not observe a similar event and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\textit{t}_{\text{sc}}$</tex-math> </inline-formula> reaches to 6.5 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $</tex-math> </inline-formula> s. The finite-element simulation and physical analysis reveal that short-circuit stress cause a severe leakage current within the embedded SBD, thereby preventing the interruption of short-circuit current. Unfortunately, the power dissipation caused by SBD leakage current provides a positive feedback with temperature, and thus, temperature continuously increases toward a higher value, eventually leading to the destructive failure of devices.