A Sub-THz Harmonic Recycling Single-Stage Frequency Quadrupler in CMOS 28-nm Technology

A single-stage frequency quadrupler operating in the 199GHz-219GHz frequency range is presented. The quadrupler utilizes a 2nd harmonic trap and recycles the trapped power to generate additional power towards the desired 4th harmonic. The quadrupler has a peak power of -2.54dBm while consuming 54mW, resulting in a maximum efficiency ηMAX=1.03%. The circuit occupies an area of 370μm×240μm, the smallest footprint among the reported sub-THz frequency quadruplers. An on-chip LC oscillator and a tuned buffer provide the input signal to the quadrupler, constituting a fully integrated system.