Preparing MPICH for exascale

The advent of exascale supercomputers heralds a new era of scientific discovery, yet it introduces significant architectural challenges that must be overcome for MPI applications to fully exploit its potential. Among these challenges is the adoption of heterogeneous architectures, particularly the integration of GPUs to accelerate computation. Additionally, the complexity of multithreaded programming models has also become a critical factor in achieving performance at scale. The efficient utilization of hardware acceleration for communication, provided by modern NICs, is also essential for achieving low latency and high throughput communication in such complex systems. In response to these challenges, the MPICH library, a high-performance and widely used Message Passing Interface (MPI) implementation, has undergone significant enhancements. This paper presents four major contributions that prepare MPICH for the exascale transition. First, we describe a lightweight communication stack that leverages the advanced features of modern NICs to maximize hardware acceleration. Second, our work showcases a highly scalable multithreaded communication model that addresses the complexities of concurrent environments. Third, we introduce GPU-aware communication capabilities that optimize data movement in GPU-integrated systems. Finally, we present a new datatype engine aimed at accelerating the use of MPI derived datatypes on GPUs. These improvements in the MPICH library not only address the immediate needs of exascale computing architectures but also set a foundation for exploiting future innovations in high-performance computing. By embracing these new designs and approaches, MPICH-derived libraries from HPE Cray and Intel were able to achieve real exascale performance on OLCF Frontier and ALCF Aurora respectively.

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Publication Details

Journal
The International Journal of High Performance Computing Applications
Published
2025-01-09
DOI
https://doi.org/10.1177/10943420241311608
Citations
3
Primary Topic
Parallel Computing and Optimization Techniques
Type
article
Field-Weighted Citation Impact
6.81

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article

Preparing MPICH for exascale

Sayantan Sur, Steve Oyanagi, Lena Oden, Rajeev Thakur et al.
3 citations
The International Journal of High Performance Computing Applications
Parallel Computing and Optimization Techniques
6.81
article

Preparing MPICH for exascale

Sayantan Sur, Steve Oyanagi, Lena Oden, Rajeev Thakur, Jithin Jose, Yanfei Guo, Wesley Bland, Sagar Thapaliya, Marc Snir, Robert Latham, Giuseppe Congiu, Pavan Balaji, Thomas Gillis, Kaiming Ouyang, Charles J Archer, Min Si, Ken Raffenetti, Dmitry Durnov, Rohit Zambre, Taru Doodi, Michael Chuvelev, Hui Zhou, Hajime Fujita, Shintaro Iwasaki, Abdelhalim Amer, Alex Brooks, Gengbin Zheng, Sangmin Seo, Maria Garazan
article en
3 citations

Abstract

The advent of exascale supercomputers heralds a new era of scientific discovery, yet it introduces significant architectural challenges that must be overcome for MPI applications to fully exploit its potential. Among these challenges is the adoption of heterogeneous architectures, particularly the integration of GPUs to accelerate computation. Additionally, the complexity of multithreaded programming models has also become a critical factor in achieving performance at scale. The efficient utilization of hardware acceleration for communication, provided by modern NICs, is also essential for achieving low latency and high throughput communication in such complex systems. In response to these challenges, the MPICH library, a high-performance and widely used Message Passing Interface (MPI) implementation, has undergone significant enhancements. This paper presents four major contributions that prepare MPICH for the exascale transition. First, we describe a lightweight communication stack that leverages the advanced features of modern NICs to maximize hardware acceleration. Second, our work showcases a highly scalable multithreaded communication model that addresses the complexities of concurrent environments. Third, we introduce GPU-aware communication capabilities that optimize data movement in GPU-integrated systems. Finally, we present a new datatype engine aimed at accelerating the use of MPI derived datatypes on GPUs. These improvements in the MPICH library not only address the immediate needs of exascale computing architectures but also set a foundation for exploiting future innovations in high-performance computing. By embracing these new designs and approaches, MPICH-derived libraries from HPE Cray and Intel were able to achieve real exascale performance on OLCF Frontier and ALCF Aurora respectively.

The International Journal of High Performance Computing ApplicationsVol. 39(2)
University of California, Riverside (US), FernUniversität in Hagen (DE), Argonne National Laboratory (US), Microsoft (United States) (US), Intel (United States) (US), University of Illinois Urbana-Champaign (US), University of California, Irvine (US), Hewlett Packard Enterprise (United States) (US), Nvidia (United States) (US), Cerebras Systems (United States), Exelis (United States) (US)
U.S. Department of Energy
Industry, innovation and infrastructure
Openalex Percentile: Top 5%
Parallel Computing and Optimization Techniques
6.81
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