The application of failure analysis technology in the development of new quality productive forces in high-density chip level packaging industry
To highlight the role of new quality productive forces in the development of the integrated circuit industry, this paper introduces a business cooperation model that incorporates fault analysis technology to assist in process validation during the product development stage. Through systematic research and analysis of phosphorus content in the plating process of integrated circuit packaging substrates, the process control window for phosphorus content is defined for customers. This approach effectively mitigates potential failure hazards that may occur in the plating process, creating value for customers by reducing R&D costs and shortening development time. The innovation and enhancement of this business cooperation model have promoted the optimization of the integrated circuit production process and improved the overall quality of integrated circuits.
Authors
- Yong He (ORCID: https://orcid.org/0000-0002-9404-798X)
- Zhimao Ming
- Wei Zhao (ORCID: https://orcid.org/0000-0003-2407-7312)
- Youda Huang (ORCID: https://orcid.org/0000-0003-4548-7759)
Institutions
- Guangzhou Electronic Technology (China) (CN)
Publication Details
- Journal
- IET conference proceedings.
- Published
- 2025-01-01
- DOI
- https://doi.org/10.1049/icp.2024.3701
- Primary Topic
- Integrated Circuits and Semiconductor Failure Analysis
- Type
- article
- Field-Weighted Citation Impact
- 0.00