4MBPS 1553B bus communication card based on MiniVPX architecture
Aiming at the requirements of miniaturization and integration of aviation test equipment and the problems of complex logic and limited transmission rate of commonly used 1553B bus interface, we propose a design scheme of a high-speed 1553B bus communication card based on MiniVPX architecture, which adopts the LHB155304 as the protocol processing unit with a one-way dual-redundant 1553B channel, and the transmission rate is up to 4 Mbit/s. XC7A200T FPGA is used as the main controller to communicate with LHB155304, and the FPGA realizes data interaction through PCIE bus with CPU in the MiniVPX test equipment. This paper introduces the basic characteristics of the 1553B bus and MiniVPX architecture, and elaborates on the hardware design of the 1553B bus interface, the firmware design of BC mode of 1553B bus, and the implementation of host computer driver software. The designed 1553B bus BC mode is tested and verified, and the results show that the transmission rate of the card communication interface meets the requirement of 4 Mbit/s, and the real-time performance is good, which meets the requirements of engineering application.
Authors
- Liyan Qiao (ORCID: https://orcid.org/0000-0002-7397-3458)
- Debao Wei (ORCID: https://orcid.org/0000-0001-6353-1384)
- Yinghong Yue (ORCID: https://orcid.org/0000-0002-8000-1606)
- Chen Chen (ORCID: https://orcid.org/0000-0003-2325-1198)
Institutions
- Harbin Institute of Technology (CN)
Publication Details
- Journal
- IET conference proceedings.
- Published
- 2025-01-01
- DOI
- https://doi.org/10.1049/icp.2024.2821
- Primary Topic
- Engineering and Test Systems
- Type
- article
- Field-Weighted Citation Impact
- 0.00