FIR filter based voltage-current phase calibration method for power analysers

Aiming at the difficult problem of low sampling rate of high-resolution ADC in power analysis, this paper proposes a real-time voltage and current phase correction method based on an FIR digital filter. The homologous clock technique is used to achieve multi-channel data acquisition synchronization. The combination of integer and fractional parts in a high precision phase correction approach is discussed. The FIR digital filter is implemented in FPGA using the serial-parallel combination technique. Additionally, the FIR filter only uses 4*18 KB of RAM and 4 DSP 48E1 IP cores to implement real-time filter calculation on the FPGA. Experiments demonstrate that the proposed method can achieve 1.95 ns step and a correction index of -512.5 us to +512.5 us when the sampling rate is 2 MSa/s. Good real-time performance and sparse resource usage are the main attributes of the proposed approach. The proposed method is used to get good phase correction results on a power analyzer with 2 MSa/s and 18 bits.