Design of digital filter with variable cutoff frequency based on FPGA
Digital filter is a module often used in engineering design. In order to design more flexible filter, a scheme of digital filter with variable cutoff frequency is proposed. A digital filter is designed by using FPGA technology. The upper computer sends the control instruction of the end frequency to the FPGA, which is extracted by the front-end extractor to reduce the sampling rate, and then performs 100-order FIR filtering operation with the filter coefficient, and performs truncation processing after the operation. Then the signal is interpolated to restore the sampling rate of the signal, and the truncation is processed again after the interpolation. The test results show that the filter can convert the cutoff frequency in a large range, the filter has simple flow, good filtering effect, wide application range and strong flexibility, and can help engineers to solve many engineering problems.
Authors
- Jia Zhao (ORCID: https://orcid.org/0009-0006-5849-4324)
- Yong Yang (ORCID: https://orcid.org/0000-0002-9928-7165)
Institutions
- Chengdu Medical College (CN)
Publication Details
- Journal
- IET conference proceedings.
- Published
- 2025-01-01
- DOI
- https://doi.org/10.1049/icp.2024.2911
- Primary Topic
- Advanced Algorithms and Applications
- Type
- article
- Field-Weighted Citation Impact
- 0.00