Technology for robust, low-latency frequency and phasor estimation and evaluation with a real HV short-circuit event
With the increasing share of decentralized generation, the handling of faults requires additional attention, which is why fault-ride-through simulations are required in several countries for grid connection above a certain power. The scenarios are severe voltage dips caused by short circuits in the high-voltage grid and elimination after 60-150 ms. The aim is to prevent such an event from leading to a cascading failure of a significant proportion of decentralized generation and a subsequent imbalance between generation and consumption.
Authors
- Gerd Bumiller (ORCID: https://orcid.org/0000-0003-4466-3220)
Institutions
- Ruhr West University of Applied Sciences (DE)
Publication Details
- Journal
- IET conference proceedings.
- Published
- 2025-01-01
- DOI
- https://doi.org/10.1049/icp.2024.1872
- Primary Topic
- Power System Optimization and Stability
- Type
- article
- Field-Weighted Citation Impact
- 0.00