Design of a Test Bench for 1.5kV Solid State Circuit Breaker for Transport Electrification

This paper deals with the detailed design and laboratory testing methodology for a 1.5kV/70A Solid State Circuit Breaker (SSCB) for Medium Voltage Direct Current (MVDC) applications. The paper reviews the parameters and characteristics of wide bandgap semiconductors suitable for the protection of MVDC circuits. This consisting of detailed design process for the selection of the main MOSFET, transient voltage suppressors (TVS) to achieve the allowable voltage transient, current sensor, gate driver, and current limiting inductor for the selected di/dt limit. The laboratory testing methodology uses fast-acting IGBTs which allows for the application of short circuit faults in a controlled environment. The stiff DC grid is created by using an appropriately sized capacitor that holds energy of which only 1% is used for testing. The whole test bench has to be kept in an enclosure that is only opened once the capacitor voltage reaches a safe level. This is first of kind effort to achieve the short circuit fault clearing time of less than 2μs for an MVDC application.