Comparative Analysis of Modeling Communication in SoCs for the Shift-Left Paradigm using IEEE 1666 SystemC

In the realm of system level design and verification of complex communication systems, several modeling and simulation tools play a crucial role. Among which, Real Number Modeling is of prime importance. In the process of complex modeling, the shift-left paradigm allows testing and validation in an earlier phase and leads to a higher quality system, with reduced cost and shorter development cycles. Real Number Modeling is capable of handling mixed-signal simulations with both digital and analog elements in the same discrete event environment. This paper deals with identifying modeling paradigms in IEEE 1666 (SystemC), with speed as the prime consideration.The investigation covers three primary aspects – the first being a comprehensive comparison of speed performance in models, ranging from complex to simple executed in SystemC DE (Discrete Event), SystemC TDF (Timed Data Flow) and both (TDF+DE). The analysis begins with a complex scenario such as that of a Receiver and further breaks down to simpler ones such as a Low Noise Amplifier. In both cases a mixed model (TDF+DE) is observed to be the fastest. The second aspect deals with analysing the behaviour of SystemC DE and TDF with M number of connected modules in chain and parallel setups. TDF approach is seen to have a performance advantage here, provided the modules are connected to a single source. The third aspect details on factors experimented to save computation time while modeling a system. Among which, the use of datatype converters and number of modules in a cluster are the evaluated elements. Results discussed in the paper show that there are still undiscovered, yet considerable opportunities for improvement in this domain.