Custom TTA Operations for Accelerating the Ascon Encryption Algorithm

Lightweight cryptography is becoming increasingly important in modern applications, especially in resource-constrained environments such as Internet of Things (IoT) devices, embedded systems and mobile platforms. The Ascon encryption algorithm is a modern, secure and efficient cryptographic scheme that meets the demands of low-power devices. However, some steps of the algorithm are computationally intensive, leading to performance issues. In this study, custom operations are proposed to accelerate the Ascon encryption algorithm on Transport-Triggered Architecture (TTA) processors. In order to make more efficient use of hardware resources, the custom operations are designed to have low complexity and high efficiency. The OpenASIP tool was employed to integrate the operations into a general purpose 64-bit TTA processor. The resulting application-specific core was implemented in Hardware Description Language (HDL) and synthesised for FPGA. The performance gain is analysed for different transport bus configurations. The results obtained show that the Ascon-AEAD128 encryption and decryption phases are accelerated by 38% to 50%. When evaluated together with the synthesis results, a significant performance gain was achieved with a very reasonable increase in hardware resources. The study also emphasises that the TTA is a suitable method for accelerating cryptographic applications that require low power consumption and high efficiency.