A Traffic Sign Recognition System using FPGA-Based YOLOv3-Tiny Network

This paper presents the development of a traffic sign recognition and detection system utilizing the Kria KV260. The system combines hardware and software, with input data collected via camera and processed using the YOLOv3-Tiny network, a model developed by Joseph Redmon. The results are decoded and displayed directly on a screen. The research evaluated and compared models such as RCNN, its enhanced version, YOLOv2, and YOLOv3 to determine the suitable model based on processing speed, accuracy, and model size. After fine-tuning and implementing on the FPGA-SoC (Systemon-Chip), YOLOv3-Tiny was chosen, delivering mean average precision (mAP) of about 94% across 40 data classes, with processing speeds of 20 to 29 FPS on hardware. The study highlights the great potential of deploying a YOLOv3-Tiny-based traffic sign recognition system on FPGA platforms, proposing the way to develop real-time traffic recognition systems.