Performance Optimization of Inverted-T SSOI FinFET for RF Applications

In this paper, the analog and RF performance of inverted-T FinFET (IT-FinFET) transistor are investigated using TCAD simulation. Compared with 14 nm FinFET, the device increases the channel width under a given layout area, so that the on-current increases by about 300 %. The electrostatic control capability is optimized by adjusting the device structure. The work functions of SOI region and fin region of the device are respectivelyset to make threshold voltages of horizontal and vertical channels consistent. reduces the subthreshold slope (SS) to 73.3 mV/decade. We have used strained Siicon as material for the device to further increase the on-current <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(I_{on})$</tex> and trans-conductance <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(G_{m})$</tex>. The <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$G_{m}$</tex> is increasd to 0.35 mSum. Thanks to the Inverted-T structure, the cut-off frequency <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(f_{T})$</tex> increases 10 %, mainly due to increase in transconductance and decrease parasitic capacitance. Without the backgate bias, the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$f_{T}$</tex> achieves 389 GHz. Additionally, as the backgate voltage is incremented to 2 V, the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$f_{T}$</tex> increases to 397 GHz.