A Scalable Model for On-Chip Interdigital Capacitor Based on Space-Mapping Neural Network

A scalable model for on-chip interdigital capacitor is proposed based on space-mapping neural network (SMNN), which combines the equivalent circuit of capacitor and perceptron neural network. By expanding the traditional series equivalent circuit into a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\pi$</tex>-type structure and adding a series network of resistor and capacitor to characterize the coupling effect, the variation of the equivalent series resistance (ESR) and S-parameter with frequency can be effectively predicted. According to the mathematical equation, the value of each component for the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$1\text{-}\pi$</tex> equivalent circuit model can be quickly and correctly obtained. In order to effectively improve the prediction accuracy and convergence speed of neural network, Particle Swarm Optimization (PSO) and Levenberg-Marquardt Back Propagation (LMBP) are used to select and optimize the weights and thresholds of the neural networks. Compared with the traditional neural network model, the proposed SMNN reduces the number of neurons required to map the input-output nonlinear relationship, so that the modeling time is only reduced to <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$10 \sim 15$</tex> seconds, and the test data accuracy is good.