A Low Power Frequency Synthesizer with Dual-Path Architecture

In this paper, we present a frequency synthesizer for low-voltage applications, utilizing a dual-path charge-pump phase-locked loop (PLL) architecture. The proportional path charge pump is designed with a IUP charge-only structure, which alleviates the need for stringent current matching in the charge pump (CP). As a result, there is no need for current mismatch suppression techniques, leading to lower power consumption and simplifying the circuit design of the CP. The VCO features a ring oscillator that is both compact and energy-efficient, leveraging its self-generated multi-phase outputs to achieve frequency tripling, which further reduces power consumption.