Transistor Breakdown Detection Circuit Design Based on CMOS BCD Process for High-voltage Output Stage of Neural Stimulators

Neural stimulators with high-voltage output stage have the risk of transistor breakdown. This work presents two circuit designs for detecting malfunction of the high-voltage transistors at the output stage, so that warning signals can be generated when transistor breakdown happens. The first detection scheme uses a circuit containing a high-voltage comparator with high-voltage switches. The second scheme uses a low-voltage comparator and a step-down module to reduce the voltage of the signal to be detected. Both circuits are designed in Cadence using 180-nm BCD CMOS technology. The functions of the proposed circuits have been verified by simulation results with a high-voltage neural stimulator. Performances comparison is made and shows that scheme two could be chosen as a preferred solution. In both scenarios, the total system power consumption is below 30 μ W, and the detection response time is under 300 ns. The detection circuits proposed in this work could improve the safety of neural stimulator with high-voltage output stages.