An ALU Digital Backend Design Based on 90nmCNTFET Process
As silicon-based integrated circuits scale down to dimensions below 65nm, they experience significant drawbacks such as severe leakage current and short-channel effects. Carbon Nanotube Field Effect Transistors (CNTFET) have emerged as a promising alternative for future integrated circuits due to their extremely small size, ultra-high carrier mobility, and quasi-one-dimensional ballistic transport properties. The Arithmetic Logic Unit (ALU) is a crucial component of processors and a focal point of research and development. This paper presents the design of an ALU based on the 90nmCNTFET Process Design Kit (PDK) developed by our research group. The ALU is capable of performing 12 functions, including addition, subtraction, and shifting operations. The digital backend design was completed using Innovus and compared to the TSMC90nm technology. The 90nm CNTFET-based ALU demonstrated a power consumption of 0.559mW, a delay of 1.188ns, and a power-delay product of 0.664pJ. The total layout area was 200µm × 200µm. The power-delay product of the 90nmCNTFET ALU shows an improvement over the ALU designed with TSMC90nm technology.
Authors
- Jianhua Jiang (ORCID: https://orcid.org/0000-0002-9149-2922)
- Yijun Cai
- Eric Yu (ORCID: https://orcid.org/0000-0002-3832-5981)
- Chengying Chen (ORCID: https://orcid.org/0000-0001-5726-0709)
Institutions
- Peking University (CN)
- Xiamen University of Technology (CN)
Publication Details
- Published
- 2024-10-25
- DOI
- https://doi.org/10.1109/icicm63644.2024.10814368
- Primary Topic
- Advancements in Semiconductor Devices and Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00