SER-NET: A Neuralize PCB Simulataneous Escape Routing Method Using Deep Reinforcement Learning

Simultaneous escape routing is a challenging issue in PCB routing, as it involves the escape of pins within two integrated circuits (ICs) to boundaries under limited resources and net order constraints. With advancements in IC fabrication technologies, there has been an increase in the number of pins in ICs and a reduction in package size, further complicating the simultaneous escape problem in printed circuit boards (PCBs). Our approach addresses this problem by dividing it into two stages: escape endpoint assignment and end-to-end routing. We utilize graphical convolutional neural networks and attention-based networks to create policy and value models for specifying escape endpoints. These models learn PCB layouts and nets representations to replace human decision-making and evaluation. Through near-end policy optimization, we update the model parameters. We then apply the model outputs to a congestion negotiation-based router to enhance the quality of simultaneous escape routing. Our method consistently achieves 100% routability in all cases, outperforming other routers that can only complete routing for a portion of the problem.