A Pipelined SAR ADC with Single-Ended CDS in Fully Differential Residue Amplifier

This paper studies a pipelined SAR ADC with a single-ended correlated double sampling (CDS) in a fully differential residue amplifier. To improve the ADC's offset and noise performance, the single-ended CDS technique is adopted for the residue amplifier. Compared to amplifiers with double-ended CDS techniques, the amplifier with the single-ended CDS technique requires no additional settling time, avoids the risk of critical node voltages being locked, and consumes less hardware overhead. We reuse the comparator in the pipelined SAR ADC, which increases power efficiency and area utilization. The proposed design is implemented in a 65nm standard CMOS technology with a 3.3V supply voltage and 2.5V reference voltage. Extensive experiments are conducted to verify our design.