Image Processing Acceleration Using Radix-8 Booth Multiplier with Custom Designed 4:2 Compressors
The Booth multiplier is widely used for efficient signed multiplication by reducing the count of partial sums. Among its types, the Radix-4 multiplier stands out for its simplicity in partial product production. However, the Radix-8 method introduces more delay while producing partial products. It is because of the generation of odd multiples of the multiplicand. This issue can be solved through approximation designs. This publication presents a design for a compressor-biased 16x16 Radix-8 Booth multiplier. This design integrates Radix-Booth encoding and compressors to implement appropriate multipliers, reducing the usage of full adders in the multiplier circuits. The approximate design AxBM2 achieves a 67.88% reduction in timing (from 417 ns to 134 ns), a 62.77% reduction in slices (from 661 slices to 246 slices), and a 30.53% improvement in Bonded IOB utilization (from 26.214 to 18.210) compared to the exact multiplier. In image processing applications, the approximate multiplier yields a PSNR of 33.03 dB and an SSIM of 0.9453, indicating minimal distortion and high structural similarity. These results highlight the effectiveness of approximate computing in reducing delay and hardware resource consumption, making it a viable solution for image processing applications.
Authors
- S. Hariprasad
- Maria Dominic Savio M
- M. Naveen
- D Akriti
- R Rithvidas
Institutions
- SRM Institute of Science and Technology (IN)
Publication Details
- Published
- 2024-11-18
- DOI
- https://doi.org/10.1109/icdici62993.2024.10810991
- Citations
- 1
- Primary Topic
- CCD and CMOS Imaging Sensors
- Type
- article
- Field-Weighted Citation Impact
- 0.21