A CPU-FPGA Based Heterogeneous Accelerator for DNA Sequence Alignment

The BWA-MEM alignment software, known for its efficient algorithm with lower space-time complexity, is extensively used for sequence alignment in low-cost, high-throughput second-generation sequencing. However, the computationally intensive task of the Smith-Waterman (S-W) algorithm accounts for over 50% of the runtime, highlighting a significant performance bottleneck. In this work, we have designed an accelerator for the S-W algorithm using Verilog, focusing on three main optimization strategies: 1) Implementing a ping-pong buffering structure to hide memory access latency during batch processing. 2) Designing an accelerator capable of adapting to any size of scoring matrix computation based on a one-dimensional systolic array. 3) Proposing a Processing Element (PE) reuse strategy to enhance the utilization rate of PEs and devising a dual-pointer control scheme to simplify PE control. We integrated this accelerator into a CPU-FPGA heterogeneous system, significantly enhancing BWA-MEM software performance through CPU and FPGA synergy. Additionally, we developed a CPU-GPU heterogeneous system for comparative analysis employing a similar strategy. In the CPU-FPGA system, the systolic array, incorporating 32 PEs, achieved an 85% PE utilization rate and an 18.27x acceleration ratio.