A D-Band Linear Power Amplifier with Adaptive Feedback Linearizer in 40nm CMOS

This paper introduces a two-way three-stage Dband linear power amplifier (PA) based on 40nm CMOS technology with a center frequency of 140 GHz. The PA employs an Adaptive Feedback Linearizer (AFL) for biasing to enhance linearity and utilizes a transformer-based current combining network to combine the power from the two ways to improve the output power (Pout). A gain-boosting unit (GBU) is employed in the first stage of the PA to enhance gain and multilayer stacked transformer (MLST) is used for matching networks to reduce insertion loss. Post simulation results at 1.2 V supply voltage and 140 GHz indicate the proposed PA provides 13.4 dBm of saturation output power (Psat) and 11.1 dBm of 1dB gain compression output power (OP1dB). This PA achieves 5.2% and 2% power added efficiency (PAE) at OP1dB and 6dB back-off. The small-signal gain is 11.1 dB, with a 3-dB bandwidth of 11.2 GHz, ranging from 133.9 GHz to 145.1 GHz.