A Low Energy BFSK Receiver with Adaptive Clock-less Digital Demodulation
This article presents an energy-efficient binary frequency shift keying (BFSK) receiver supporting 915MHz for wireless body area networks (WBAN) applications. The proposed receiver implemented in the 55nm complementary metal-oxide-semiconductor (CMOS) technology with IV supply. An improved passive mixer is proposed to reduce power consumption while providing gain. The proposed receiver employs an adaptive clock-less demodulation method, enabling fast demodulation of the required data at a rate of 5Mb/<tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$s$</tex> with a latency of only 184ns. The receiver consumes <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$448\text{pW}$</tex>, corresponding to an energy consumption of 89.6pJ per received bit.
Authors
- Tao Lan (ORCID: https://orcid.org/0000-0001-5306-5826)
- Ziyi Zhang (ORCID: https://orcid.org/0009-0005-0939-3968)
- Shiwei Li (ORCID: https://orcid.org/0000-0002-0633-7873)
- Yiming Zheng (ORCID: https://orcid.org/0000-0002-7947-2769)
- Jiwei Huang (ORCID: https://orcid.org/0000-0002-6780-4025)
Institutions
- Fuzhou University (CN)
Publication Details
- Published
- 2024-10-25
- DOI
- https://doi.org/10.1109/icicm63644.2024.10814181
- Primary Topic
- Advancements in PLL and VCO Technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- National Natural Science Foundation of China