A Low Energy BFSK Receiver with Adaptive Clock-less Digital Demodulation

This article presents an energy-efficient binary frequency shift keying (BFSK) receiver supporting 915MHz for wireless body area networks (WBAN) applications. The proposed receiver implemented in the 55nm complementary metal-oxide-semiconductor (CMOS) technology with IV supply. An improved passive mixer is proposed to reduce power consumption while providing gain. The proposed receiver employs an adaptive clock-less demodulation method, enabling fast demodulation of the required data at a rate of 5Mb/<tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$s$</tex> with a latency of only 184ns. The receiver consumes <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$448\text{pW}$</tex>, corresponding to an energy consumption of 89.6pJ per received bit.

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Published
2024-10-25
DOI
https://doi.org/10.1109/icicm63644.2024.10814181
Primary Topic
Advancements in PLL and VCO Technologies
Type
article
Field-Weighted Citation Impact
0.00

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article

A Low Energy BFSK Receiver with Adaptive Clock-less Digital Demodulation

Tao Lan, Ziyi Zhang, Shiwei Li, Yiming Zheng et al.
Advancements in PLL and VCO Technologies
article

A Low Energy BFSK Receiver with Adaptive Clock-less Digital Demodulation

Tao Lan, Ziyi Zhang, Shiwei Li, Yiming Zheng, Jiwei Huang
article en

Abstract

This article presents an energy-efficient binary frequency shift keying (BFSK) receiver supporting 915MHz for wireless body area networks (WBAN) applications. The proposed receiver implemented in the 55nm complementary metal-oxide-semiconductor (CMOS) technology with IV supply. An improved passive mixer is proposed to reduce power consumption while providing gain. The proposed receiver employs an adaptive clock-less demodulation method, enabling fast demodulation of the required data at a rate of 5Mb/<tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$s$</tex> with a latency of only 184ns. The receiver consumes <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$448\text{pW}$</tex>, corresponding to an energy consumption of 89.6pJ per received bit.

Fuzhou University (CN)
National Natural Science Foundation of China
Affordable and clean energy
Openalex Percentile: Top 77%
Advancements in PLL and VCO Technologies
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A Low Energy BFSK Receiver with Adaptive Clock-less Digital Demodulation — Tao Lan, Ziyi Zhang, et al. · (2024) | TGRS Research Map | TGRS