Heterogeneous PMLFMA for Strategies of Accelerating Aggregation Process on DSP Clusters
This paper, based on domestic supercomputers and combined with the MT3000-digital signal processor (M-DSP), tests the performance of the Method of Parallel Multilevel Fast Multipole Algorithm (PMLFMA) at both coarse-grained process level and fine-grained thread level. Taking DSP platform as an example, a method to accelerate the Aggregation process on CPU-DSP heterogeneous platform is introduced. The test result shows that under the condition of more than 100 million unknowns, the process can be expanded by 20 times while still ensuring more than 30% parallel efficiency.
Authors
- Huaguang Bao (ORCID: https://orcid.org/0000-0001-9609-247X)
- Dazhi Ding (ORCID: https://orcid.org/0000-0001-5550-1812)
- Jihong Gu (ORCID: https://orcid.org/0000-0002-5989-1579)
- Zhaoyuan Wang (ORCID: https://orcid.org/0000-0002-0092-5949)
- Enrui Liang
- Mengmeng Li (ORCID: https://orcid.org/0000-0002-6317-875X)
Institutions
- Nanjing University of Science and Technology (CN)
Publication Details
- Published
- 2024-11-27
- DOI
- https://doi.org/10.1109/mape62875.2024.10813989
- Primary Topic
- Wireless Sensor Networks and IoT
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- National Natural Science Foundation of China
- Natural Science Foundation of Jiangsu Province
- National Key Research and Development Program of China