A Single-Channel 2-GS/s 8-bit Two-Step SAR ADC in 28nm CMOS

This paper presents a single-channel 8-bit 2 GS/s two-step successive approximation register (SAR) analog-to-digital converter (ADC). Combined with the passive residue transfer and comparators alternation technology, the proposed SAR ADC is currently one of the fastest single-channel 8-bit SAR ADCs, and its performance is superior to time-interleaved SAR ADCs at the same resolution and sampling rate. The proposed ADC in 28-nm CMOS consumes 6.91 mW at 2 GS/s with a 1V supply. It achieves a Nyquist SNDR of 45.6 dB and results in an FoM of 22.2 fJ/conv.-step.

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Publication Details

Published
2024-10-25
DOI
https://doi.org/10.1109/icicm63644.2024.10814399
Primary Topic
Analog and Mixed-Signal Circuit Design
Type
article
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article

A Single-Channel 2-GS/s 8-bit Two-Step SAR ADC in 28nm CMOS

Wei Han, Tiehu Li, Jia-Yan Tang, Jiayi Gui et al.
Analog and Mixed-Signal Circuit Design
article

A Single-Channel 2-GS/s 8-bit Two-Step SAR ADC in 28nm CMOS

Wei Han, Tiehu Li, Jia-Yan Tang, Jiayi Gui, Shenglei Zhao, Jianwei Liu, Xin Fu
article en

Abstract

This paper presents a single-channel 8-bit 2 GS/s two-step successive approximation register (SAR) analog-to-digital converter (ADC). Combined with the passive residue transfer and comparators alternation technology, the proposed SAR ADC is currently one of the fastest single-channel 8-bit SAR ADCs, and its performance is superior to time-interleaved SAR ADCs at the same resolution and sampling rate. The proposed ADC in 28-nm CMOS consumes 6.91 mW at 2 GS/s with a 1V supply. It achieves a Nyquist SNDR of 45.6 dB and results in an FoM of 22.2 fJ/conv.-step.

Xidian University (CN), Chongqing University of Technology (CN)
Affordable and clean energy
Openalex Percentile: Top 77%
Analog and Mixed-Signal Circuit Design
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