A 37-40 GHz Low-Power Low Noise Amplifier in 65-nm RF CMOS

This paper presents a low noise amplifier (LNA) with a bandwidth of 37–40 GHz., referred to as n260 in the FR2-band for 5G communication., implemented using 65-nm CMOS technology. Instead of using traditional LC matching networks., transformers are used for impedance matching. The LNA adopts a two-stage cascade configuration., which uses a common-source (CS) structure for the first stage and a common-source common-gate (Cascode) structure for the second stage. By limiting the operating current of the transistors., the power consumption of the entire circuit is only 7.5 mW with 1.2-V supply voltage. The proposed LNA achieves a peak gain of 16 dB with gain flatness of less than 1 dB in the Ka-band. The post-simulated noise figure (NF) is 4.9-5.2 dB from 37.5 to 39.5 GHz.