A Low-Complexity Low-Ripple Buck DC-DC Converter Based on Module Reuse

Based on double comparators and several digital units, a buck DC-DC converter is implemented in 65-nm CMOS. The switching frequency is automatic sliding from dozen kHz to sub-MHz for different load conditions. Simulated results show that the presented DC-DC converter achieve a peak-to-peak ripple voltage smaller than 2.55 mV, with the switching frequency of 18–526 kHz. The proposed DC-DC converter also has a high efficiency up to 94%, with the supply voltage of 1.8-3.3 V, the output voltage of 1.2-1.8 V, and the load current of 1–50 mA. The presented converter benefits low complexity, high efficiency, and low ripple with a module-reuse scheme, which combines the error comparator with the peak-voltage one by using digital switches.