Context Cache for Multicore RISC-V Processor
Today, the development of computer technology has led to the execution of programs using multiple threads. A context switch occurs when the operating system switches from one thread to another. The context switch saves the information necessary for the computation (context) to memory and restores the context of the next thread from memory. In real-time systems where tasks must be executed within strict time constraints, the overhead of context switches can significantly impact overall system performance. The context cache is a special cache for contexts, used as a way to reduce the overhead of context switches.In this paper, we designed and implemented a context cache for multicore RISC-V processors. This design aims to accelerate context switches within a core and thread migrations between cores, improving system responsiveness and efficiency. Our evaluation shows a substantial reduction of context switch overhead by 99% with context cache. Furthermore, when running on a single core, the performance of parallel programs using the context cache approaches the performance of single-threaded programs because the context switch overhead is negligibly small.
Authors
- Kazutoshi Suito
- Tsutomu Itou
- Nobuyuki Yamasaki
- Akira Yamazawa
Institutions
- Keio University (JP)
Publication Details
- Published
- 2024-11-26
- DOI
- https://doi.org/10.1109/candar64496.2024.00043
- Citations
- 1
- Primary Topic
- Embedded Systems Design Techniques
- Type
- article
- Field-Weighted Citation Impact
- 0.49