Adaptive Parallelization based on Frame-level and Tile-level Parallelisms for VVC Encoding

Versatile Video Coding (VVC) has been developed to satisfy the growing demand for high video compression rates. Compared to its predecessor, High Efficiency Video Coding (HEVC), it achieves approximately a 50% bitrate reduction at equivalent video quality. However, since VVC requires more computations, the encoding process takes more time than that of HEVC. Therefore, reducing the encoding time of VVC is a big challenge for practical implementation. Given the advancement of multi-core processors and the introduction of encoding tools supporting multi-core processors, parallel processing in the video encoding emerges as one of effective solutions. This paper proposes an adaptive parallelization method based on frame-level and tile-level parallelisms of VVC to reduce the encoding time while mitigating degradation in the coding efficiency. In the proposed method, the numbers of parallel frames and tiles are determined based on the reference relationship between frames. To effectively reduce the encoding time, the proposed method cyclically adjusts the tile configurations tailored to video contents. The evaluation results show that the proposed method achieves a ten times speedup on average compared to the non-parallel encoding. The proposed method also suppresses the increases in BD-BR and BD-PSNR by 3.23% and -0.058 dB, respectively. These results clarifies that the proposed method reduces the encoding time significantly while slightly sacrificing the coding efficiency.

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Publication Details

Published
2024-11-26
DOI
https://doi.org/10.1109/candar64496.2024.00018
Citations
2
Primary Topic
Silicon Carbide Semiconductor Technologies
Type
article
Field-Weighted Citation Impact
0.42

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article

Adaptive Parallelization based on Frame-level and Tile-level Parallelisms for VVC Encoding

Masayuki Satō, Hiroe Iwasaki, Kazuhiko Komatsu, Hiroaki Kobayashi et al.
2 citations
Silicon Carbide Semiconductor Technologies
0.42
article

Adaptive Parallelization based on Frame-level and Tile-level Parallelisms for VVC Encoding

Masayuki Satō, Hiroe Iwasaki, Kazuhiko Komatsu, Hiroaki Kobayashi, Karin Onouchi
article en
2 citations

Abstract

Versatile Video Coding (VVC) has been developed to satisfy the growing demand for high video compression rates. Compared to its predecessor, High Efficiency Video Coding (HEVC), it achieves approximately a 50% bitrate reduction at equivalent video quality. However, since VVC requires more computations, the encoding process takes more time than that of HEVC. Therefore, reducing the encoding time of VVC is a big challenge for practical implementation. Given the advancement of multi-core processors and the introduction of encoding tools supporting multi-core processors, parallel processing in the video encoding emerges as one of effective solutions. This paper proposes an adaptive parallelization method based on frame-level and tile-level parallelisms of VVC to reduce the encoding time while mitigating degradation in the coding efficiency. In the proposed method, the numbers of parallel frames and tiles are determined based on the reference relationship between frames. To effectively reduce the encoding time, the proposed method cyclically adjusts the tile configurations tailored to video contents. The evaluation results show that the proposed method achieves a ten times speedup on average compared to the non-parallel encoding. The proposed method also suppresses the increases in BD-BR and BD-PSNR by 3.23% and -0.058 dB, respectively. These results clarifies that the proposed method reduces the encoding time significantly while slightly sacrificing the coding efficiency.

Tohoku University (JP), Tohoku University Hospital (JP), Tokyo University of Agriculture and Technology (JP)
Hoso Bunka Foundation
Openalex Percentile: Top 36%
Silicon Carbide Semiconductor Technologies
0.42
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Adaptive Parallelization based on Frame-level and Tile-level Parallelisms for VVC Encoding — Masayuki Satō, Hiroe Iwasaki, et al. · (2024) | TGRS Research Map | TGRS