Improvement of Surface Roughness in SiO <sub>2</sub> Thin Films via Deuterium Annealing at 300 °C
Recently, deuterium annealing at a reduced temperature range of 300 °C has been proposed to enhance SiO<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> gate dielectrics and the Si/SiO<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> interface, thereby improving device reliability. As a further investigation into deuterium annealing, for the first time this study compared deuterium absorption characteristics with various SiO<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> dielectrics formed by wet oxidation, dry oxidation, low-pressure chemical vapor deposition (LPCVD), and plasma-enhanced chemical vapor deposition (PECVD). Deuterium annealing can also be used to reduce the roughness and improve the uniformity of SiO<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> dielectric films. Surface roughness of various samples was measured and quantitatively compared using atomic force microscopy (AFM) after deuterium annealing.
Authors
- Ju-Won Yeon
- Tae-Hyun Kil
- Jun-Young Park (ORCID: https://orcid.org/0000-0003-4830-9739)
- Yongsik Kim (ORCID: https://orcid.org/0000-0002-1296-3977)
- Hyojun Park (ORCID: https://orcid.org/0000-0002-7582-4763)
- Moon-Kwon Lee
- Eui-Cheol Yun (ORCID: https://orcid.org/0009-0003-0915-8015)
Institutions
- Chungbuk National University (KR)
- Daelim University College (KR)
Publication Details
- Journal
- IEEE Transactions on Nanotechnology
- Published
- 2024-12-31
- DOI
- https://doi.org/10.1109/tnano.2024.3524567
- Citations
- 1
- Primary Topic
- Semiconductor materials and devices
- Type
- article
- Field-Weighted Citation Impact
- 0.21