The effect of series stacking on fast interruption for drift step recovery diode

Abstract The excellent working consistency of drift step recovery diode (DSRD) contributes to the formation of high-voltage devices by means of connecting in series. In addition to the voltage, there are still other important parameters of DSRD when connecting in series waiting to be discussed. In this paper, the effect of series stacking on the fast interruption process of DSRD is systematically and comprehensively investigated from theory, simulation, and experiment. The pulse voltage output characteristics of DSRD based on silicon (Si) and silicon carbide (SiC) with the number of chips in the stack ranging from 1 to 8 and 1–10 are studied using transformer circuits and dual power supply circuits, respectively. The results of Si and SiC two materials exhibit good consistency, both showing that the rising time ( t r ) of the output voltage gradual decreases and then stabilizes with increase in the number of chips. By establishing a simplified equivalent circuit for stacked DSRDs in series, the calculation formula for t r is given. It turns out that the series connection can reduce the device’s capacitance and thus reduce t r , provided that the voltage obtained on each single chip does not change with the increasing stacking quantity. In addition, taking the ∼16 kV DSRD as an example, the effect of seven different stacking schemes on the fast interruption of the device is analyzed. Based on the standards of high V peak , high d v /d t , and small t r , the output characteristics of the schemes with stacking quantities 1 and 14 are the worst, while the schemes with stacking quantities 2–5 have better characteristics. The main reason for the phenomena depends on the relative impact of the drift layer structure and number of chips in the stacking scheme on t r .