Efficient Modeling Framework for FO-WLP Solder Interconnect Behavior During Thermal Cycling

In advanced microelectronic packaging, high thermo-mechanical loads arise on the solder interconnects. Accurate and efficient modeling of the mechanical behavior is crucial in the design of the package, and the simulation results can provide a basis for estimations of the reliability of the assembly. However, the accuracy of the simulation results depends on the accuracy of the modeled geometry and the modeling simplifications and assumptions employed to achieve computational cost-efficient calculations. In this work, finite element analysis (FEA) of a Fan Out—Wafer Level Packaging (FO-WLP) layout was carried out considering the following variations: modeling domain (2-D and pseudo-3-D) was defined for creating the efficient calculation framework, where soldering material (SAC 305 and SACQ), incorporation of intermetallic compound (IMC), bond pad edge geometry (sharp and blunt) were modeled for cycles of thermal load. Stress and strain analysis was carried out to evaluate the solder behavior for the parameter variations. Furthermore, fatigue indicators were evaluated. An efficient planar simulation framework with 2-D and pseudo-3-D meshed geometries provides a quick estimate for the lower and upper bound for the strain, stress and strain energy-related parameters, respectively. This calculation framework can be employed for extensive parameter studies solved rapidly at low computational costs.