Measuring of Parasitic Inductances Through Resonance Effects in GaN Half-Bridges

To evaluate the quality of printed circuit board layouts it is necessary to quantify parasitic inductances. This plays an increasingly important role as a quality criterion for partially automated layouts, especially in fast-switching applications. To estimate such inductances, semi-analytical approaches and finite element analysis are used but because of the small values of parasitic elements an experimental validation is still challenging. This paper presents a measurement technique to quantify the parasitic inductances in a common transistor half-bridges commutation loop. The method is then used to verify calculation and simulation results. A forced resonant oscillation in the commutation loop is used to determine the parasitic inductance.