Design of a Low Phase Noise LC-VCO in 22nm Process Technology
This paper presents a design method of LC-VCO with Class-B structure using 22 nm FD-SOI process. The VCO mainly uses second harmonic filtering technology to reduce phase noise. The supply voltage is 0.8V and the power consumption is 12.3mW. The simulation results show that when the frequency tuning range is 18.9 GHz to 21.3 GHz, the phase noise at 1MHz offset is −108.56 dBc/Hz. At this frequency, the VCO has good noise performance.
Authors
- Wenlong He (ORCID: https://orcid.org/0000-0001-7018-0527)
- Yunxiao Zhu (ORCID: https://orcid.org/0000-0002-3759-7010)
- Zhaohui Wu (ORCID: https://orcid.org/0000-0002-0725-6792)
- Feng Liu (ORCID: https://orcid.org/0000-0003-1493-5352)
- Ziqi Ke (ORCID: https://orcid.org/0000-0003-3350-059X)
- Mingze Li
Institutions
- Shenzhen University (CN)
- Institute of Microelectronics (CN)
Publication Details
- Published
- 2024-11-04
- DOI
- https://doi.org/10.1109/csrswtc64338.2024.10811658
- Primary Topic
- Semiconductor materials and devices
- Type
- article
- Field-Weighted Citation Impact
- 0.00